The hardware design for this system is organized into two logical units, one responsible for
user IO and the other responsible for media data IO. These units are connected via
a 16-bit microprocessor implementing the P37X ISA, which was developed for the University of
Pennsylvania's undergraduate computer science curriculum. All communication between the
processor and its IO devices is handled through memory-mapping. Therefore, the processor is
unaware that these devices exist, treating device communication as standard loads and stores
The user IO unit consists of a video controller, which passes a matrix of 128 x 124 pixel data
values to a vga display, and an interface to the FPGA's built-in LEDs, dip-switches, and push-
buttons. Through this unit, the processor has a mechanism for accepting commands from the user
and presenting system-state and media files via a graphical user interface.
The data IO unit consists of a compact flash controller, which passes data from permanent storage
to the system's on-chip memory, and an audio controller, which presents audio samples to the
FPGA's built-in AC97 codec and digital-to-analog converter. (The audio controller can also
capture input samples from a microphone connected to the FPGA, but this functionality
is not currently used in the system.) Through this unit, the processor has a mechanism for
populating the system's memory with program and media data, and where appropriate, playing audio.
Click Here to see a block diagram of the system's hardware.
Click Here to see the system's memory mapping interface.