ESE171: Principles of Digital Design Laboratory
Each lab will require you to give a demo to the lab TAs who will verify that your circuit works properly. The demo is due at the end of the lab section. However, if you are not able to give the demo during the lab section, you can do it during the FIRST 30 minutes of the next lab. However, no demos will be accepted after the first 30 minutes. If needed, you can work on the lab outside the regular lab schedule to further debug the circuit so that you will be ready to give the demo when the next lab starts.
Our goal is to go as paperless as possible. Instead of taking printouts of the schematics, VHDL code, and timing diagrams, you will take screenshots of the schematics, code and timing diagrams. We recommend using the Windows 7 Snipping Tool for taking screenshots. Save the screenshot to a personal drive (flash drive, ENIAC drive) for your report. Reports will be submitted electronically on Blackboard. Graded reports with comments will be available through Blackboard as well.
Saving your Xilinx Projects
When finished with your project you need to save your work to your Eniac account or a personal flash drive. Do NOT assume that files saved on the Ketterer lab computers will be there the next time you login. First, archive the project using the Xilinx ISE software. This will save your entire project in a .zip file. Save this .zip file in either your ENIAC drive (S drive) or a flash drive.
For grading and late policies, see the Blackboard site for ESE171
The pre-lab assignment MUST be completed PRIOR to coming to the lab. NO CREDIT will be given if the pre-lab is not completed before the start of lab.
Using or attempting to use unauthorized assistance, materials, or lab results or solutions (in part or in whole) is a violation of the Code of Academic Integrity and will result in a zero grade for the course.