UNIVERSITY of PENNSYLVANIA
Department of Electrical and Systems Engineering

ESE171: Principles of Digital Design Laboratory

Spring 2014


Syllabus

Lab Day

Lab Topic

Reports


January 21
January 24

NO LAB DUE TO INCLEMENT WEATHER!

January 27
January 28
January 31

Lab 0 and Lab 1: Introduction to the Xilinx Toolchain (Parts 1 & 2)

  • Safety issues
  • Using Xilinx and building a Half Adder
  • Using skills learned in half adder tutorial to build a full adder
February 3
February 4
February 7

Lab 2: Traffic Light Controller

  • Convert truth tables to combinational circuits
  • Design of a decoder for a 7-segment display
  • Use of buses
  • Use of the pattern wizard for test bench waveforms
  • VHDL (hardware description language)
Lab 2 Discussion Questions: TBA
February 10
February 11
February 14

Lab 3: Four-bit Adder

  • Design and simulation of a 4-bit adder
  • VHDL (Hardware description language)
  • 7-segment decoder
February 17
February 18
February 21

Lab 4: Combinational Multiplier

  • 4-bit by 4-bit multiplier
  • Binary-to-BCD conversion
  • Timing Constraints
  • Reading ISE Reports
  • VHDL Testbenches
February 24
February 25
February 28
Lab 4: Combinational Multiplier (continued)
Mar 3-Mar 7
(by appt. only)
Lab 4: Combinational Multiplier demo (only if needed) Report 1: Combinational Multiplier
(Due Fri. Mar 7 at 11:59pm)
March 8-16 Spring Break
March 17
March 18
March 21

Lab 5: ALU Design and Implementation

  • Design a 8-bit ALU
  • Use of the Core Generator
  • Implementation and testing the ALU
  • VHDL Testbenches
March 24
March 25
March 28
Lab 5: ALU (continued)
March 31
April 1
April 4

Lab 6: FSMs and VGA Controller

  • Implementing finite state machines
  • Using the IP Core Generator
  • Using VHDL Processes
April 7
April 8
April 11

Lab 7: RPN Calculator

  • Shift registers
Lab 6 Discussion Questions
April 14
April 15
April 18

Lab 8 (Final Project): The Game of Pong

  • State Machine Diagrams
  • Registers and memory
  • Decoding
April 21
April 22
April 25
Lab 8 (Final Project): The Game of Pong (continued) Report 2: ALU and Calculator


Supported by a grant of Xilinx Corporation


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Last Updated: December 23, 2013