ESE370 Fall 2016 Working Schedule

Wk Lect. Date Lecture Slides Due Reading
1 1 8/31 W Intro/Overview [lec1] [lec1_6up] 1 through 1.2; review course web page completely
2 9/2 F Transistor Introduction (basics) and Gates from Transistors [lec2] [lec2_6up] review ESE215; 6.2 through static properties in 6.2.1
2 9/5 M Labor Day Diagnostics Quiz (in Canvas)
9/7 W Lab (Detkin): Gate from Discrete Transistors HW 1 HW 2, Lab Instructions
3 9/9 F Gates from Transistors (concl) and Transistor Introduction (first order) [lec3] [lec3_6up] 3.1
3 4 9/12 M Regenerative Property [lec4] [lec4_6up] 1.3.2
9/14 W Lab (Detkin): SPICE starter HW 2 HW 3
5 9/16 F Delay and RC Response [lec5] [lec5_6up] 1.3.3
4 6 9/19 M MOS Model [lec6] [lec6_6up]
ADD DATE
2.1-2.3, 3.3.1
7 9/21 W MOS Transistor Operating Regions: Part 1 [lec7] [lec7_6up] HW 3 3.3.2 (to pg 94)
8 9/23 F MOS Transistor Operating Regions: Part 2 [lec8] [lec8_6up] 3.3.2 (to pg 103)
5 9 9/26 M MOS Transistor Details [lec9] [lec9_6up] 3.3.2 (remainder)
10 9/28 W MOS Transistor Variation [lec10] [lec10_6up] HW 4 3.3.3, 3.4
11 9/30 F Layout and Area [lec11] [lec11_6up] 2.3
6 10/3 M Midterm 1: 7--9pm in Moore 216 (no lecture) exam (no answers) solutions
12 10/5 W MOS Scaling [lec12] [lec12_6up] 3.5
10/7 F Fall Break
7 13 10/10 M Performance: Inverter [lec13] [lec13_6up] DROP DATE 5.4
14 10/12 W Performance: Gates [lec14] [lec14_6up] HW 5 6.2.1 Delay and Performance (pp242-256)
15 10/14 F Energy Basics [lec15] [lec15_6up] 5.5
8 16 10/17 M Energy and Delay Tradeoffs [lec16] [lec16_6up] 6.2.1 Power Consumption (pp257-263)
17 10/19 W Ratioed Gates [lec17] [lec17_6up] HW 6 6.2.2
18 10/21 F Design Space Exploration [lec18] [lec18_6up] [Design Example Notes]
9 19 10/24 M Pass-Transistor Logic: Part 1 [lec19] [lec19_6up] 6.2.3
20 10/26 W Pass-Transistor Logic: Part 2 (cascading without buffers)
[lec20] [lec20_6up] Proj 1.M 6.2.3
21 10/28 F Distributed RC Wire Elmore Delay [lec21] [lec21_6up] 4 to 4.3, 4.4, 4.5.1
10 22 10/31 M Driving Capacitive Loads [lec22] [lec22_6up] 5.4.3
23 11/2 W CMOS Worst Case Analysis and Logic Comparisons [lec23] [lec23_6up] Proj 1 6.5
24 11/4 F Synchronous Timing Discipline and Clocking [lec24] [lec24_6up] 7.1-7.3
11 25 11/7 M Dynamic Logic (More Synchronous, Precharge Logic) [lec25] [lec25_6up] 7.5
11/9 W Midterm 2: 7--9pm in Moore 216 (no lecture) exam no solutions solutions
26 11/11 F Memory overview, organization, and architecture [lec26] [lec26_6up] Withdraw DATE 12.1
12 27 11/14 M RAM: Core Part 1 [lec27] [lec27_6up] 12.2.3
28 11/16 W RAM: Core Part 2 [lec28] [lec28_6up] 12.2.3
29 11/18 F RAM: periphery [lec29] [lec29_6up] HW 7 12.3
13 11/21 M Lab (Detkin): Inductive Noise and crosstalk [Lab Instructions]
30 11/23 W('F') Crosstalk [lec30] [lec30_6up] 9.2.1
11/25 F Thanksgiving Holiday
14 11/28 M Lab (Detkin): Transmission Line Measurement Lab Instructions Proj 2.M
31 11/30 W Noise: Inductive [lec31] [lec31_6up] 9.4.1, 4.3.3
32 12/2 F Trans. Line Intro and Analysis [lec32] [lec32_6up] 4.4.5, 4.5.2, 9.4.2
15 33 12/5 M Trans. Line Modeling and Termination [lec33] [lec33_6up] 4.4.5, 4.5.2, 9.4.2
34 12/7 W Transmission Lines Implications [lec34] [lec34_6up] HW 8 Bakoglu 6.1 (6.11)
35 12/9 F Repeaters in Wiring
[lec35] [lec35_6up] 9.3.3
16 36 12/12 M Review [lec36] [lec36_6up] Proj 2
EW 12/15 Th Final Exam 12pm in Moore 216 [final] [solutions]

This working calendar is on the web: http://www.seas.upenn.edu/~ese370/fall2016/syllabus.html. Please, recheck the page on the web as details may be adjusted as the term progresses. Lectures notes, reading, and handouts will be filled as we reach them.


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