I aspire to be a tall, thin computer architect. I try to understand and exploit the potential of reconfigurable computing. I believe we can harness ever-increasing VLSI capacities by organizing our computation spatially on reconfigurable substrates like FPGAs. To truly realize the promise of reconfigurable computing, we need to-
develop high-level compute and programming models for describing the computation
continually explore and revise physical substrate organizations to reflect VLSI realities
devise efficient, fast CAD algorithms for mapping to reconfigurable substrates
create design environments and methodologies for high-productivity application development
Professional and Research Experience
I have worked with Christof Koch, my previous research
advisor from CNS (Computational
And Neural Systems), in the summer of 2004. We implemented an FPGA-based
saliency algorithm originally developed at KLAB.
I took some ideas from my KLAB research and went to Xilinx for an internship.
There, I worked on architectural modeling of offchip memory controllers for
streaming spatial designs.
I was a Design Engineer at Paxonet Communications (now Conexant in 2002-2003 where I've worked on making FPGA/ASIC IP
cores for protocols in optical networks.