Reading for Tuesday, February 25

1. Peter Denyser and David Renshaw. VLSI Signal Processing: A Bit-Serial Approach, pages 1--28. Addison-Wesley Publishing Company. 1985.
2. R. F. Lyon. Two's Complement Pipeline Multipliers. IEEE Transacations on Communications, April 1976.
3. Tsuyoshi Isshiki and Wayne Wei-Ming Dai. High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems. In IEEE Symposium on Field-Programmable Gate Arrays. IEEE, February, 1995