Reading for Tuesday, March 4

1. Aditya A. Agarwal and David Lewis. Routing Architectures for Hierarchical Field Programmable Gate Arrays. In Proceedings 1994 IEEE International Conference on Computer Design, pages 475--478. IEEE, October 1994.
2. Jonathan Rose and Stephen Brown. Flexibility of Interconnection Structures for Field-Programmable Gate Arrays. IEEE Journal of Solid-State Circuits, 26(3):277--282, March 1991.
3. XC4000 Series Field Programmable Gate Arrays, pages 4-{5-6} and 4-{31-40}.
4. FLEX10K Embedded Programmable Logic Family Data Sheet, ver. 2, pages 31, 40, 51-54, 63-65, 69-70, 72, and 75.

Supplemental Reading

1. Vi Cuong Chan and David M. Lewis. Area-Speed Tradeoffs for Hierarchical Field-Programmable Gate Arrays. In Proceedings of the 1996 International Symposium on Field-Programmable Gate Arrays, pages 51--57. ACM/SIGDA, February, 1996.
2. Yao-Wen Chang and D. F. Wong and C. K. Wong. Universal Switch-Module Design for Symmetric-Array-Based FPGAs. In Proceedings of the 1996 International Symposium on Field-Programmable Gate Arrays, pages 80--86. ACM/SIGDA, February, 1996.
3. Muhammad Khellah, Stephen Brown, and Zvonko Vranesic, "Minimizing Interconnection Delays in Array-based FPGAs," In Proceedings of the 1994 Custom Integrated Circuits Conference, pages 181-184, San Diego CA, May 1994. [PS]
4. Stephen D. Brown, Robert J. Francis, Jonathan Rose, and Zvonko G. Vranesic. Field-Programmable Gate Arrays. Kluwer Academic Publishers, 101 Philip Drive, Assinippi Park, Norwell, Massachusetts, 02061 USA, 1992.
5. André DeHon. Entropy, Counting, and Programmable Interconnect. (Shorter version in FPGA'96). [HTML] [TR PS] n.b. The switching requirements for the m choose k switching block (which seemed to confuse people in lecture) is detailed in the appendix in this TR.