Reading for Thursday, January 23

1. André DeHon, Reconfigurable Architectures for General-Purpose Computing. AI Technical Report 1586, MIT Artificial Intelligence Laboratory, 545 Technology Sq., Cambridge, MA 02139, Chapters 14-15, pages 299-316, October 1996. [PS for pp. 299-316], [HTML for Chapter 14 and Chapter 15], [Full Document].
2. Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu, V.Leo Rideout, Ernest Bassous, and Andre R. LeBlanc. Design of Ion-Implanted MOSFET's with Very Small Physical Dimensions. Journal of Solid-State Circuits, 9(5):256--268, October 1974.
   n.b.Feel free to just skim this for the high-level bit of information.
3. Mark Bohr. Interconnect Scaling -- The Real Limiter to High Performance ULSI. In International Electron Devices Meeting 1995 Technical Digest, pages 241--244. Electron Devices Society of IEEE, December 1995.
4. Mark Bohr. MOS Transistors: Scaling and Performance Trends. Semiconductor International, pages 75--79, June 1995.

Supplemental Reading

1. Xilinx, Inc., Gate Count Capacity Metrics for FPGAs. XAPP 059, 2100 Logic Drive, San Jose, CA 95124, August, 1996. [PDF]