A Time-Multiplexed FPGA
A Time-Multiplexed FPGA
Speaker: Steve Trimberger <steve.trimberger@xilinx.com>
When: Wednesday, April 30, 1997, 5pm
Where: Cory Hall--Hogan Room
Abstract:
This presentation describes the architecture of a time-multiplexed
FPGA. Eight configurations of the FPGA are stored in on-chip memory.
This inactive memory is distributed around the chip, and accessible so
that the entire configuration of the FPGA can be changed in a single
cycle of the memory. The entire configuration of the FPGA can be
loaded from this on-chip memory in 30ns. Inactive memory is
accessible as block RAM for applications. The FPGA is based on the
Xilinx XC4000E FPGA, and includes extensions for dealing with state
saving and forwarding and increased routing demand due to
time-multiplexing the hardware.