Working Calendar: ESE532, Fall 2020

Wk Lect. Date Lecture Slides Due Ref.
1 1 9/2 W Intro/Overview ppt pdf read
2 9/7 M No Class: Labor Day Holiday
9/8 T uniprocessor and C Refresher 5:30pm Eastern
2 9/9 W Analysis, Metrics, Bottlenecks ppt pdf read
9/11 F HW1: Hello AWS Overview
3 3 9/14 M Basic Memory ppt pdf read
4 9/16 W Parallelism Overview ppt pdf read
9/18 F HW2: Software, Analysis
4 5 9/21 M Dataflow Process Model ppt pdf read
6 9/23 W Data Parallel (SIMD, Vector) ppt pdf
post lecture ppt (table completed)
9/25 F HW3: Multiple Processors
5 7 9/28 M Pipelining ppt pdf
8 9/30 W Spatial Computations (hardware) ppt pdf
post lecture ppt with tables completed
10/2 F HW4: Vector
6 9 10/5 M HLS: C-to-gates (C-for-gates) ppt pdf
10 10/7 W Midterm Exam (no lecture) Midterm Format and Regulation
Midterm as Given
Midterm Solutions
10/9 F No assignment due.
7 11 10/12 M Coding HLS for Accelerators ppt pdf
(drop date) read
12 10/14 W Distributed Memory and Data Movement ppt pdf read
10/14 W 4:30pm Invited to ESE680 guest lecture by Stephen Neuendorffer at Xilinx on compiler optimizations for data movement in VERSAL
10/16 F HW5: Accelerator
8 13 10/19 M Vitis/OpenCL Data Transfer Model ppt pdf read
14 10/21 W Orchestrating Data in Memories ppt pdf read
10/21 W 4:30pm: invited to ESE680 guest lecture by Randy Huang on AWS Inferentia Chip Development
10/23 F No assignment due; start on HW 6
9 15 10/26 M Development by Incremental Refinement ppt pdf read
16 10/28 W Project Overview: Deduplication and Compression ppt pdf read
10/30 F HW6: Streaming Pipelined Accelerator
10 17 11/2 M Maps and Hash Tables (LZW and interaction with) ppt pdf
post lecture ppt
18 11/4 W Design Space Exploration (and left-over Hash Tables) ppt pdf read
11/6 F Project
P1: Analysis
11 19 11/9 M Verification 1 ppt pdf (withdraw date) read
20 11/11 W Verification 2 ppt pdf
post lecture slides (adds result of working Preclass 3)
11/13 F P2: Design and Function
12 21 11/16 M Reduce ppt pdf read
22 11/18 W Estimating Chip Area and Costs ppt pdf read
11/20 F P3: I/O, FPGA
13 23 11/23 M Energy ppt pdf read
11/25 W(F) No Class: Penn on Friday Schedule
11/27 F Thanksgiving Holiday (No assignment due)
14 24 11/30 M Real Time ppt pdf read
25 12/2 W Real-Time Scheduling ppt pdf
post lecture slides (adds preclass 3b/3c schedules)
12/4 F P4: 200Mb/s
15 26 12/7 M VLIW ppt pdf read
27 12/9 W Software Pipelining ppt pdf
[post lecture, worked examples]
28 12/10 R Wrapup ppt pdf P5: Final Project Report
12/18 F Final Exam Registrar Preliminary Schedule is for 9-11am; plan to run like midterm, so anywhere in 24 hour period of the day
Final Format and Regulation
Final Given
Final Solutions

This working calendar is on the web: Please, recheck the page on the web as details may be adjusted as the term progresses. Except for weather and other unexpected events, schedule of assignments and exams should not change. Lectures notes, reading, and handouts will be added as we reach them.

ESE532: System-on-a-Chip Architecture