Jing (Jane) Li

Eduardo D. Glandt Faculty Fellow,
Associate Professor

Department of Electrical and Systems Engineering (primary)
Department of Computer and Information Science (secondary)
University of Pennsylvania

Email: janeli at seas.upenn.edu
Lab website: PennCIL

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Dr. Jing (Jane) Li is the Eduardo D. Glandt Faculty Fellow and Associate Professor at the Department of Electrical and System Engineering (primary) and the Department of Computer and Information Science (secondary) at the University of Pennsylvania. Previously she was the Dugald C. Jackson Assistant Professor at the University of Wisconsin–Madison and a faculty affiliate with the UW-Madison Computer Architecture group and Machine Learning group. She is one of the PIs in SRC JUMP center – Center for Research on Intelligent Storage and Processing-In-Memory (CRISP). She spent her early career at IBM T. J. Watson Research Center as a Research Staff Member after obtaining her PhD degree from Purdue University in 2009.

She is attracted to all the big problems she can find in computer system across the stack regardless the specific sub-areas. She is a passionate computer experimentalist and enjoy building real computer systems (both hardware and software). She has made contributions to the following “memory-centric” areas: 1) domain-specific accelerator and its interaction with emerging memories (HMC/HBM/NVM), 2) programmable in-memory computing architecture enabled by emerging nonvolatile memories (PCM/RRAM), 3) system support (e.g., virtualization) for accelerators (e.g., FPGA), and 4) FPGA-based full system simulation infrastructure (MEG) for memory system research. She has strong ties with leading technology companies and has successful technology transfer experience (>40 issued/pending patents).

She is the recipient of prestigious NSF Career Award in 2018, DARPA’s Young Faculty Award (one out of 2 in computer area and one out of 26 across all areas in science and technology nationwide, the first awardee in computer engineering and computer science at UW-Madison) in 2016, WARF Innovation Awards (WIA) Finalist (only 6 patented technologies out of 400+ patents got selected university wide), IBM Research Division Outstanding Technical Achievement Award in 2012 for successfully achieving CEO milestone, multiple invention achievement awards and high value patent application awards from IBM from 2010-2014, IBM Ph.D. Fellowship Award in 2008, Meissner Fellowship in 2004 from Purdue University, etc. Her research was reported by Yahoo News, Newegg Business, Digital Trends, etc. And she was featured in Madison Magazine (Channel 3000) as a rising research star.

She has been serving on the technical committee for the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), International Symposium on Computer Architecture (ISCA), MLSys, International Symposium on High Performance Computer Architecture (HPCA), International Symposium on Field-Programmable Gate Arrays (FPGA), International Symposium on Field-Programmable Custom Computing Machines (FCCM), Design Automation Conference (DAC), International Conference on Computer‑Aided Design (ICCAD), International Symposium on Low Power Electronics and Design (ISLPED), International Symposium on Microarchitecture (MICRO) (external), IEEE International Symposium on Circuits and Systems (ISCAS), International Electron Devices Meeting (IEDM), etc.. She served as the advisory chair/general chair / technical chair / finance chair / publicity chair for a premier industry memory conference, International Memory Workshop (IMW) and co-organized it with Intel/Micron/SK Hynix/CEA LETI to hold annual meetings with worldwide memory vendors. She is in the Steering/Organizing Committee for IMW, and serves as the Publicity Chair for FPGA'20, FPGA'19 and ISLPED'18, the Demo Chair for MLSys'20 . She is an editor for Journal of Low Power Electronics (JOLPE). She is serving at ACM SIGDA Technical Committee on FPGAs and Reconfigurable Computing (TC-FPGA).

Education

  • PhD in Computer Engineering, 2009
    Purdue University
  • BSc in Electrical Engineering, 2004
    Shanghai Jiaotong University

Research Interests

  • Computer Architecture
  • Compiler
  • Machine Learning
  • Distributed Systems
  • VLSI

Selected Honors and Awards

  • Eduardo D. Glandt Faculty Fellow, University of Pennsylvania, 2020
  • Johnson & Johnson WiSTEM2D Scholars Award Nominee (sole nominee university wide in the Engineering category), University of Wisconsin-Madison, 2019
  • Madison Teaching and Learning Excellence (MTLE) faculty fellowship, 2019
  • Best Paper nominee, FCCM, 2019
  • Best of CAL (Best Paper Award), IEEE Computer Architecture Letters, 2018
  • Moore Inventor Fellowship Nominee (1 out of 2 university wide), University of Wisconsin-Madison, 2018
  • NSF Career Award, National Science Foundation, 2018
  • Featured in Madison Magazine (Channel 3000) as a Rising Research Star, 2017
  • Dugald C. Jackson Faculty Scholar of Electrical and Computer Engineering  (named after the first department chair of ECE), University of Wisconsin-Madison, 2017
  • Hilldale Faculty Research Fellowship, University of Wisconsin-Madison, 2017
  • DARPA Young Faculty Award, Defense Advanced Research Projects Agency (one out of 2 in computer area and one out of 26 across all areas in science and technology nationwide, the first awardee in computer engineering and computer science at UW-Madison), 2016
  • WARF Innovation Awards (WIA) Finalist, University of Wisconsin-Madison (6 out of 400++ patents), 2016
  • VLSI Transactions Best Paper Award, IEEE Circuits and Systems Society, 2013
  • Outstanding Research Division Technical Achievement Award ( highest technical award for successfully achieving CEO milestone on Storage Class Memory), IBM T. J. Watson, 2012
  • IBM High Value Patent Application Awards, IBM T. J. Watson, 2014
  • IBM Invention Achievement Awards, IBM T. J. Watson, 2010-15
  • IBM PhD Fellowship Award, 2008-09
  • The Dean’s and Semester Honors for Outstanding Scholastics Performance, Purdue University, 2007-08.
  • Magoon Award for Excellence in Teaching, Purdue University, 2005-06
  • Meissner Fellowship Award, Electrical and Computer Engineering department, Purdue University, 2004-05.

Publications

Students under my supervision are denoted by "S"

Selected Invited Talks (external)

  1. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical and Computer Engineering, Stanford University, Apr. 3rd, 2019
  2. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical and Systems department, University of Pennsylvania, Feb. 7th, 2019
  3. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical and Computer Engineering, Cornell University, Dec. 12th, 2018
  4. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical and Computer Engineering, Carnegie Mellon University (CMU), Nov. 30th, 2018.
  5. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Computer Science, University of Chicago, Nov. 6th, 2018
  6. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical Engineering, Yale University, Nov. 2nd, 2018.
  7. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Dept. of Electrical and Computer Engineering, University of California, Los Angeles (UCLA), 12:30pm–1:30pm PST, Oct. 15th, 2018.
  8. “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-point Memory,” Harvard University, 3:00pm–4:00pm EST, September 28th, 2018
  9. “Enabling Nonvolatile Memory for Data-Centric Computing: Technology, Circuit and System,” Panasonic Corp., 4:00pm to 5:00pm, Kyoto, Japan, July 16th, 2015
  10. “Enabling Phase-change Memory for Data-Centric Computing: Technology, Circuit and System,” Special session at IEEE international Symposium on Circuits and Systems (ISCAS), Lisbon, May 25th, 2015
  11. “Emerging-Materials-Enabled Devices for Data-Centric Computing,” Special guest lecture co-sponsored by CTO, APTD, and WPDN, Applied Materials, 3:00pm – 4:00pm PST, August 27th, 2014
  12. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Colloquium of Electrical and Computer department at Purdue University, 3:00pm – 4:00pm EST, April 28th, 2014
  13. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Colloquium of Electrical and Systems department at University of Pennsylvania, 11:00am – 12:00pm EST, March 17th, 2014
  14. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Electrical Engineering Seminar Series at Harvard University, 3:00pm – 4:00pm EST, March 7th, 2014
  15. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Electrical and Computer Engineering Department Seminar at University of Illinois Urbana-Champaign (UIUC), 4:00pm – 5:00pm CST, March 3rd, 2014
  16. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Computer Engineering Seminar at University of California Santa Barbara (UCSB), 11:00am – 12:00pm PST, February 12th, 2014
  17. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Joint CSSI and CALCM Seminar Series at Carnegie Mellon University (CMU), 12:00pm – 1:00pm EST, 1st, 2013
  18. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Electrical Engineering Seminar Series at University of California, Los Angeles (UCLA), 1:00pm – 2:30pm PDT, Oct 28th, 2013
  19. “Data Centric Computing in Emerging Technologies: A PCM-CMOS Hybrid Hardware Accelerator,” Electrical Engineering Seminar Series at Princeton University, 12:30pm – 1:30pm EST, Oct 16th, 2013
  20. “A Holistic View of Architecting Storage Class Memory into Future System,” Invited tutorial on system-technology interaction, International Memory Workshop (IMW), Milan, Italy, May 20, 2012
  21. “Resistance Drift in Phase Change Memory,” The IEEE International Reliability Physics Symposium (IRPS), Anaheim, CA, April 19, 2012
  22. “Phase Change Memory,” The Connecticut Microelectronics and Optoelectronics Consortium (CMOC) Twenty-First Annual Symposium, Storrs, CT, April 11, 2012
  23. “Phase Change Memory Design: Challenges and Opportunities,” China Semiconductor Technology International Conference (SEMICON China), Shanghai, China, March 15-17, 2011
  24. “Design Challenges in Multi-Level Phase Change Memory,” New Non-Volatile Memory Workshop (NNVMW’10), Industrial Technology Research Institute (ITRI), Hsin-chu, Taiwan 11, 2010
  25. “Robust Design in Emerging Technologies,” Intel Corporation, CA, 2:00 pm-3:30 pm PDT, Feb.1,2008
  26. “A Genetic and Reconfigurable Test Paradigm Using Low-Cost Integrated Poly-Si TFT,” LSI Corporation, CA, 1:30 pm-3:30 pm PDT, Oct.19, 2007

Professional Activities (external)

  • Demo Chair, MLSys, 2020.
  • Publicity Chair, International Symposium on Field-Programmable Gate Arrays (FPGA), 2020, 2019.
  • Publicity Chair, International Symposium on Low Power Electronics and Design (ISLPED), 2018.
  • Advisory Chair/General Chair/Technical Chair/Finance Chair/Publicity Chair  at International Memory Workshop (annual meeting with world-wide memory vendors, co-organized w/ Intel, Micron, SK-Hynix, CEA LETI), 2013-Present
  • TPC of ASPLOS’20, MLSys’20, HPCA’20, ISCA’19, MLSys’19, FPGA’19, FCCM’19, FPGA’18, FCCM’18, DAC’18, DAC’14, DAC’13, DAC’12, ICCAD’17, ICCAD’16, ISLPED’18, ISLPED’17, GLVLSI’18, MICRO’16 (external), IEDM’17, IEDM’16, ISCAS’17, ISCAS’16.
  • Micro MBA, for perspective business/technical leaders at IBM, 2011