5. Accelerator¶
Due
Wednesday, October 13, 5:00 PM
In this assignment, we will accelerate an application by implementing functions on the FPGA.
This assignment involves CAD tool tasks that take a long time. We strongly recommend that you start early on this assignment.
Note
Lectures for Vitis/OpenCL data model don’t occur until the week the assignment is due. You aren’t writing new code here, so we expect you can begin working through this and things will become clearer during the week.
You probably want to read through the entire assignment (including the Homework Submission section) before you start to work on the assignment.