How do we physically implement computations?
Broadly, my research interests address this question, including
physical substrates (VLSI, molecular, ...), programmable media
(FPGAs, (multi-) processors, ...), mapping (compilation and CAD),
system abstractions and dynamic management
(run-time systems, OS, scheduling),
and problem capture (programming languages).
- PLD: Fast FPGA Compilation to Make Reconfigurable Acceleration
Compatible with Modern Incremental Refinement Software Development in ASPLOS, March 2022.
- SCALPEL: Exploring
the Limits of Tag-enforced Compartmentalization in ACM JETC, January
- Preventing Dynamic Library Compromise on Node.js via RWX-Based
Privilege Reduction in ACM CCS, November 2021.
Least-Privilege Analysis (μSCOPE: A Methodology for Analyzing Least-Privilege Compartmentalization in Large Software Artifacts) in RAID, October 2021.
- XBERT: Xilinx Logical-Level Bitstream Embedded RAM Transfusion in FCCM, May 2021.
- HLS-Compatible, Embedded-Processor Stream Links in FCCM, May 2021.
Dataplane Disaggregation and Placement for P4 Programs in
NSDI, April 2021.
Linking of Separately-Compiled FPGA Blocks without a NoC in ICFPT, December 2020.
- DeepMatch: Practical Deep Packet Inspection in the Data Plane using Network
Processors in CoNEXT, December 2020.
Reducing FPGA Compile Time with Separate Compilation for FPGA Building
Blocks in ICFPT, December 2019.
Pipelined Parallel Finite Automata Evaluation in ICFPT, December 2019.
the Stack with Metadata Policies and Tagged Hardware in IEEE
S&P (Oakland), May 2018.
Timing Repair in IEEE Design and Test, November/December 2017.
DOVER Edge in RICV-V
Workshop, July 2016.
- Accurate Parallel Floating-Point Accumulation
in IEEE Transactions on Computers, November 2016.
a Metadata-extended RISC-V
Workshop, January 2016.
Underpinnings of Reconfigurable Computing Architectures in Proc. of the IEEE Special Issue on Reconfigurable Sysems,
- Reconfigurable Computing Architectures in Proc. of the IEEE Special Issue on Reconfigurable Sysems,
Support for Software-Defined Metadata Processing in ASPLOS, March 2015.
- Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, edited book from Elsevier (available from amazon.com)
- For more complete and earlier publications, see longer list.
- ESE 532:
System-on-a-Chip Architecture (Penn, Spring and Fall 2017, Fall 2018,
Fall 2019, Fall 2020, Fall 2021)
- ESE 150: Digital Audio
Basics (Penn, Spring 2018, Spring 2019, Spring 2020, Spring 2021)
- ESE370: Circuit-Level
Modeling, Design, and Optimization for Digital Systems, (Penn, Fall
2010, 2011, 2012, 2013, 2014)
- ESE534: Computer
Organization, (Penn, Spring 2010, 2012, 2014, 2016)
- ESE250: Digital Audio
Basics, (Penn, Fall 2009, Spring 2013)
- ESE535: Electronic Design
Automation (Penn, Spring 2008, 2009, 2011, 2013, 2015)
- see longer list for earlier courses
André DeHon <firstname.lastname@example.org>
Electrical and Systems Engineering
University of Pennsylvania
200 S. 33rd Street
Philadelphia, PA 19104