How do we physically implement computations?
Broadly, my research interests address this question, including
physical substrates (VLSI, molecular, ...), programmable media
(FPGAs, (multi-) processors, ...), mapping (compilation and CAD),
system abstractions and dynamic management
(run-time systems, OS, scheduling),
and problem capture (programming languages).
Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically
Reconfigurable Array of Gates with Outrageous Network-delays.
in FPGA, February 2017.
Impact of Parallelism and Memory Architecture on FPGA Energy Consumption.
in ACM TRETS, August 2016.
DOVER Edge in RICV-V
Workshop, July 2016.
Continuous Online Self-Monitoring Introspection Circuitry for
Timing Repair by Incremental Partial-reconfiguration (COSMIC
TRIP) in FCCM, May 2016.
- Accurate Parallel Floating-Point Accumulation
in IEEE Transactions on Computers, November 2016.
and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement
in FPGA, February 2016.
a Metadata-extended RISC-V
Workshop, January 2016.
Minimization in the Time-Space Continuum in FPT 2016, December 2015. (Best Paper)
Underpinnings of Reconfigurable Computing Architectures in Proc. of the IEEE Special Issue on Reconfigurable Sysems,
- Reconfigurable Computing Architectures in Proc. of the IEEE Special Issue on Reconfigurable Sysems,
Support for Software-Defined Metadata Processing in ASPLOS, March 2015.
Near-Associative Memories on FPGAs in ACM TRETS, January 2015.
- GROK-LAB: Generating Real On-chip Knowledge for Intra-cluster Delays using Timing Extraction
in ACM TRETS, December 2014.
Router Support for Endpoint-Authorized Decentralized Traffic Filtering to
Prevent DoS Attacks. in ICFPT, December 2014.
- Kung Fu Data Energy---Minimizing Communication Energy in FPGA Computations in FCCM, May 2014.
- Energy Reduction through Differential Reliability and Lightweight Checking in FCCM, May 2014.
- GROK-INT: Generating Real On-chip Knowledge for Interconnect Delays Using Timing Extraction in FCCM, May 2014.
- A Verified
Information-Flow Architecture in POPL, January 2014.
- Final Report of
the CRA/CCC Visioning study on Cross
Layer Reliability, March 2011
- Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, edited book from Elsevier (available from amazon.com)
- For earlier publications, see longer list.
- ESE370: Circuit-Level
Modeling, Design, and Optimization for Digital Systems, (Penn, Fall
2010, 2011, 2012, 2013, 2014)
- ESE534: Computer
Organization, (Penn, Spring 2010, 2012, 2014, 2016)
- ESE250: Digital Audio
Basics, (Penn, Fall 2009, Spring 2013)
- ESE535: Electronic Design
Automation (Penn, Spring 2008, 2009, 2011, 2013, 2015)
- see longer list for earlier courses
André DeHon <firstname.lastname@example.org>
Electrical and Systems Engineering
University of Pennsylvania
200 S. 33rd Street
Philadelphia, PA 19104