Conferences & Workshops

1. "Navigating heterogeneous processors with market mechanisms," 19th IEEE International Symposium on High Performance Computer Architecture (HPCA), February 2013. (Presented by M. Guevara)
   
2. "Inferred models for dynamic and sparse hardware-software spaces," 45th IEEE International Symposium on Microarchitecture (MICRO), December 2012.
   
3. "Rethinking DRAM power modes for energy proportionality," 45th IEEE International Symposium on Microarchitecture (MICRO), December 2012. (Presented by K. Malladi)
   
4. "Towards energy-proportional datacenter memory with mobile DRAM," 39th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2012. (Presented by K. Malladi)
   
5. "Web search using mobile cores: Quantifying and mitigating the price of efficiency," 37th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2010.
   
6. "Phase change memory: An architecture and systems perspective," Workshop on Emerging Memory Technologies (EMT), in conjunction with ISCA-37, June 2010.
   
7. "Architecting phase change memory as a scalable DRAM alternative," 36th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2009.
   
8. "CPR - Composable performance regression for scalable multiprocessor models," 41st IEEE/ACM International Symposium on Microarchitecture (MICRO), November 2008.
   
9. "Efficiency trends and limits from comprehensive microarchitectural adaptivity," 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.
   
10. "Roughness of microarchitectural design topologies and its implications for optimization," 14th IEEE International Symposium on High Performance Computer Architecture (HPCA), February 2008.
    
11. "Methods of inference and learning for performance modeling of parallel applications," 12th ACM Symposium Principles and Practice of Parallel Programming (PPoPP), March 2007.
    
12. "Statistical inference for efficient microarchitectural analysis," Boston Area Architecture Workshop (BARC), January 2007.
    
13. "Illustrative design space studies with microarchitectural regression models," 13th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2007.
    
14. "Statistical inference for efficient microarchitectural and application analysis," IEEE/ACM International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), November 2006.
    
15. "Poster: Statistical inference for efficient microarchitectural and application analysis," IEEE/ACM International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), November 2006.
    
16. "Accurate and efficient regression modeling for microarchitectural performance and power prediction," 12th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October 2006.
    
17. "Statistically rigorous regression modeling for the microprocessor design space," Workshop on Modeling, Benchmark, and Simulation (MoBS) in conjunction with ISCA-33, June 2006.
    
18. "Effects of pipeline complexity on SMT/CMP power-performance efficiency," Workshop on Complexity Effective Design (WCED) in conjunction with ISCA-32, June 2005.
    
19. "Performance models for evaluation and automatic tuning of symmetric sparse matrix-vector multiply," 33rd International Conference on Parallel Processing (ICPP), August 2004.
    
20. "Optimizations and bounds for sparse symmetric matrix-vector multiply," SIAM Conference on Parallel Processing for Scientific Computing, March 2004.
    
21. "Poster: Automatic performance tuning of sparse matrix kernels," SIAM Conference on Computational Science and Engineering, February 2003.
    
    
    

Technical Panels

1. DOE Workshop on Modeling and Simulation of Exascale Systems and Applications, University of Washington, Seattle, August 2012.
2. NSF Workshop on a Community Supported Computer Architecture and Design Evaluation Framework, Arlington, VA June 2012.
3. "Architecting heterogeneous datacenters with algorithmic economics," Informational Futures Group Meeting, Duke University, March 2012.
4. "Mega-servers vs micro-blades for data centers," Architectural Concerns in Large Datacenters (ACLD), in conjunction with ISCA-37, June 2010.
   
5. "Phase change memory: An architecture and systems perspective," Emerging Technologies Panel, International Symposium on Nanoscale Architectures (NANOARCH), in conjunction with DAC-47, July 2009.
   
6. "Architecting phase change memory as a scalable DRAM alternative," New Memory Technology Panel, 36th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2009.
   
   
   

Tutorials

1. "Learning and inference tutorial (LIT) for large design and parameter spaces," 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.
   
2. "Inference and learning for large scale microarchitectural analysis," 34th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2007.