ESE3700 Spring 2024 Working Schedule

Wk Lect. Date Lecture Slides Due Reading

2 1 1/22 M Intro/Overview [lec1] 1 through 1.2; review course web page completely

2 1/24 W Transistor Introduction (basics) and Gates from Transistors [lec2_pc] [lec2] review ESE215; 6.2 through static properties in 6.2.1

1/26 F Diagnostics Quiz (canvas)

3 1/29 M Lab 1 (Detkin): Gate from Discrete Transistors [Lab Instructions]

3 1/31 W Transistor Introduction (first order), Delay and RC Response [lec3_pc] [lec3] ADD DATE 3.1, 1.3.3

2/2 F HW 1

4 4 2/5 M Regenerative Property [lec4_pc] [lec4] 1.3.2

5 2/7 W MOS Intro, Transistor Operating Regions: Part 1 [lec5_pc] [lec5] 2.1-2.3, 3.3.1-3.3.2 (page 92)

2/9 F HW 2 22nm_HP.pm

5 6 2/12 M MOS Transistor Operating Regions: Part 2, Parasitics [lec6_pc] [lec6] 3.3.2 (remainder)

7 2/14 W Layout and Area, MOS Scaling [lec7_pc] [lec7] 2.3, 3.5

2/16 F HW 3

6 8 2/19 M MOS Scaling (con't), MOS Variation [lec8_pc] [lec8] 3.3.3, 3.4

2/21 W Midterm 1 (during class) in Moore 216 [exam] [solutions]

7 9 2/26 M Performance: Inverter, Gates [lec9_pc] [lec9] 5.4, 6.2.1 Delay and Performance (pp 242-256)

2/27 T DROP DATE

10 2/28 W Energy Basics [lec10_pc] [lec10] HW 4 5.5

8 3/4 M Spring Break

3/6 W Spring Break

11 3/11 M Energy Delay Tradeoffs [lec11_pc] [lec11] 6.2.1 Power Consumption (pp257-263) [remainder]

12 3/13 W Ratioed (Pseudo-nMOS) Logic and Design Space Exploration [lec12_pc] [lec12] 6.2.2

3/14 Th HW 5
9 13 3/18 M Pass Transistor Logic [lec13_pc] [lec13] 6.2.3

14 3/20 W Distributed RC Wire Elmore Delay, CMOS Worst Case Analysis [lec14_pc] [lec14] 4 to 4.3, 4.4, 4.5.1

10 3/25 M CMOS Worst Case (wrap up) and Project 1 OH (in classroom) [lec14_pc] [lec14] 4 to 4.3, 4.4, 4.5.1

15 3/27 W Driving Large Capacitive Loads and Repeaters in Wiring [lec15_pc] [lec15] 5.4.3

3/29 F Proj 1

11 16 4/1 M Synchronous Timing Discipline and Clocking [lec16_pc] [lec16] 7.1-7.3

4/2 T Withdraw DATE

4/3 W Midterm 2 (during class) in Moore 216 [exam] [solutions]

12 17 4/8 M Dynamic Logic (Lecture virtual at 10:15am-11:45am - recording in Canvas) [lec17_pc] [lec17] 7.5

18 4/10 W Memory Overview, RAM Core Part 1 [lec18_pc] [lec18] HW 6 12.1, 12.2.3

4/12 F

13 19 4/15 M RAM Core Pt 2 and Periphery [lec19_pc] [lec19] 12.2.3

4/17 W Project Office Hours 12.3

4/19 F Proj 2.M

14 4/22 M Lab 2 (Detkin): Crosstalk and Transmission Lines (Attendance required for full credit on HW 7) HW 7 [Lab Instructions]

20 4/24 W Crosstalk and Inductive Noise [lec20_pc] [lec20] 9.4.1, 4.3.3, 9.2.1

4/26 F

15 21 4/29 M Transmission Lines [lec21_pc] [lec21] 4.4.5, 4.5.2, 9.4.2

22 5/1 W Review [lec22] Proj 2

EW 5/7 T Final Exam 3-5pm in Towne 311

Wk	Lect.	Date	Lecture	Slides	Due	Reading
2	1	1/22	M	Intro/Overview	[lec1]		1 through 1.2; review course web page completely
2	1/24	W	Transistor Introduction (basics) and Gates from Transistors	[lec2_pc] [lec2]		review ESE215; 6.2 through static properties in 6.2.1
	1/26	F			Diagnostics Quiz (canvas)
3		1/29	M	Lab 1 (Detkin): Gate from Discrete Transistors			[Lab Instructions]
3	1/31	W	Transistor Introduction (first order), Delay and RC Response	[lec3_pc] [lec3]	ADD DATE	3.1, 1.3.3
	2/2	F			HW 1
4	4	2/5	M	Regenerative Property	[lec4_pc] [lec4]		1.3.2
5	2/7	W	MOS Intro, Transistor Operating Regions: Part 1	[lec5_pc] [lec5]		2.1-2.3, 3.3.1-3.3.2 (page 92)
	2/9	F			HW 2 22nm_HP.pm
5	6	2/12	M	MOS Transistor Operating Regions: Part 2, Parasitics	[lec6_pc] [lec6]		3.3.2 (remainder)
7	2/14	W	Layout and Area, MOS Scaling	[lec7_pc] [lec7]		2.3, 3.5
	2/16	F			HW 3
6	8	2/19	M	MOS Scaling (con't), MOS Variation	[lec8_pc] [lec8]		3.3.3, 3.4
	2/21	W	Midterm 1 (during class) in Moore 216	[exam] [solutions]
7	9	2/26	M	Performance: Inverter, Gates	[lec9_pc] [lec9]		5.4, 6.2.1 Delay and Performance (pp 242-256)
	2/27	T			DROP DATE
10	2/28	W	Energy Basics	[lec10_pc] [lec10]	HW 4	5.5
8		3/4	M	Spring Break
	3/6	W	Spring Break
	11	3/11	M	Energy Delay Tradeoffs	[lec11_pc] [lec11]		6.2.1 Power Consumption (pp257-263) [remainder]
12	3/13	W	Ratioed (Pseudo-nMOS) Logic and Design Space Exploration	[lec12_pc] [lec12]		6.2.2
	3/14	Th			HW 5
9	13	3/18	M	Pass Transistor Logic	[lec13_pc] [lec13]		6.2.3
14	3/20	W	Distributed RC Wire Elmore Delay, CMOS Worst Case Analysis	[lec14_pc] [lec14]		4 to 4.3, 4.4, 4.5.1
10		3/25	M	CMOS Worst Case (wrap up) and Project 1 OH (in classroom)	[lec14_pc] [lec14]		4 to 4.3, 4.4, 4.5.1
15	3/27	W	Driving Large Capacitive Loads and Repeaters in Wiring	[lec15_pc] [lec15]		5.4.3
	3/29	F			Proj 1
11	16	4/1	M	Synchronous Timing Discipline and Clocking	[lec16_pc] [lec16]		7.1-7.3
	4/2	T			Withdraw DATE
	4/3	W	Midterm 2 (during class) in Moore 216	[exam] [solutions]
12	17	4/8	M	Dynamic Logic (Lecture virtual at 10:15am-11:45am - recording in Canvas)	[lec17_pc] [lec17]		7.5
18	4/10	W	Memory Overview, RAM Core Part 1	[lec18_pc] [lec18]	HW 6	12.1, 12.2.3
	4/12	F
13	19	4/15	M	RAM Core Pt 2 and Periphery	[lec19_pc] [lec19]		12.2.3
	4/17	W	Project Office Hours			12.3
	4/19	F			Proj 2.M
14		4/22	M	Lab 2 (Detkin): Crosstalk and Transmission Lines (Attendance required for full credit on HW 7)		HW 7	[Lab Instructions]
20	4/24	W	Crosstalk and Inductive Noise	[lec20_pc] [lec20]		9.4.1, 4.3.3, 9.2.1
	4/26	F
15	21	4/29	M	Transmission Lines	[lec21_pc] [lec21]		4.4.5, 4.5.2, 9.4.2
22	5/1	W	Review	[lec22]	Proj 2
EW		5/7	T	Final Exam 3-5pm in Towne 311

This working calendar is on the web: http://www.seas.upenn.edu/~ese3700/spring2024/syllabus.html. Please, recheck the page on the web as details may be adjusted as the term progresses. Lectures notes, reading, and handouts will be filled as we reach them.

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